/*
 * ports.ti:
 *	serial port stuff for TI Professionals
 *
 * Copyright (c) 1989 University of Toronto. All rights reserved.
 * Anyone may use or copy this software, except that it may not be
 * sold for profit, that this copyright notice remain intact, and that
 * credit is given where it is due. The University of Toronto and the
 * author make no warranty and accept no liability for this software.
 */
/*
 * layout based in part on modempro.pas from Qkermit and msxtip.asm.
 * TI Pro serial port information obtained from msxtip.asm, the
 * TI Pro Technical Manual, and the Zilog Z8530 SCC product spec.
 */
static char rcsid[] = "$Header: /homes/ugw/pkern/src/cterm/RCS/ports.ti,v 1.3 89/07/06 19:45:48 pkern Exp $";

#include <dos.h>
#include "cterm.h"
#include "ti.h"

extern int nbaud, n_port;
extern uchar flowctl, bpc, stopbits, parity, m_prty, xoff;

#ifdef LOCAL
extern uchar local;
#endif
#ifdef ECHO
extern uchar echo;
#endif

static uchar buffer[BUFMAX];
static int xout=0, xin=0, n_intr=0;
static int a_cmd=0, b_cmd=0, a_data=0, b_data=0;
static int bufovfl=BUFMAX/2,	/* flow control XOFF trigger */
	bufmpty=BUFMAX/8;	/* flow control XON trigger */
static uchar flxoff=0;	/* flowctl XOFF-sent flag */

#define BUFC(a,b)	((a<b)?(a+BUFMAX-b):(a-b))

#ifdef debug
int regs[16];
#endif


/* 8259 Interrupt Controller port addresses */
#define IC8259r1	0x18 
#define IC8259r2	0x19 

/* Sync-Async Comm board port addresses */
struct port_dat {
	uchar base;	/* intr acknowledge */
	uchar enable;	/* intr enable mask */
	uchar disable;	/* intr reset mask */
	uchar vect;	/* intr vector */
} ports[NPORTS] = {
	{ 0xE0, 0xFE, 0x01, 0x40 },
	{ 0xE8, 0xFD, 0x02, 0x41 },
	{ 0xF0, 0xFB, 0x04, 0x42 },
	{ 0xF8, 0xEF, 0x10, 0x44 }
};
/* Comm board channel offsets */
#define A_CMD	6
#define A_DATA	7
#define B_CMD	4
#define B_DATA	5

		/* Channel A initialization table */
static uchar init_a[] = {
	0x09, 0xC0,	/* WR9 : reset 8530 */
	0x0B, 0x50,	/* WR11: no XTAL, RxC=BRG=TxC, TRxC pin input */
	0x0E, 0x03,	/* WR14: BRG source is PLCK pin, enable BRG */
	0x0F, 0x0,	/* WR15: disable external status interrupts */
	0x04, 0x44,	/* WR4 : x16 clock, 1 stop bit, no parity */
	0x05, 0xEA,	/* WR5 : raise DTR+RTS, 8 bits, Tx enable */
	0x03, 0xC1,	/* WR3 : 8 bits, enable receiver */
	/* WR1 : interrupt on all received chars & special conditions */
	0x01, 0x10,
	0x09, 0x08,	/* WR9 : master interrupt enable */
	0xFF, 0xFF
 };

		/* Channel B initialization table */
static uchar init_b[] = {
#if (defined(ECHO) || defined(LOCAL))
	0x0B, 0x50,	/* WR11: no XTAL, RxC=BRG=TxC, TRxC pin input */
	0x0E, 0x03,	/* WR14: BRG source is PLCK pin, enable BRG */
	0x0F, 0x0,	/* WR15: disable external status interrupts */
	0x04, 0x44,	/* WR4 : x16 clock, 1 stop bit, no parity */
	0x05, 0xEA,	/* WR5 : raise DTR+RTS, 8 bits, Tx enable */
	0x03, 0xC1,	/* WR3 : 8 bits, enable receiver */
	/* WR1 : interrupt on all received chars & special conditions */
	0x01, 0x10,
	0x09, 0x08,	/* WR9 : master interrupt enable */
#else
	0x0F, 0x0,	/* WR15: disable external status interrupts */
	0x01, 0x0,	/* WR1 : disable all other interrupts */
	0x05, 0x02,	/* WR5 : raise internal modem RTSB (RCNTRL) */
#endif
	0xFF, 0xFF
 };

/* bits-per-char table (bitwise-OR masks for WR5) */
static uchar bpctab[4] = { 0x0, 0x40, 0x20, 0x60 };


	/* Baud tables */

#define BRClkPeriod 15360 /* BR Clock Period / 10 (see Z8530 specs) */
/* divisors for Z8530 at 4.9152 Mhz */
static int bdivs[EXTB+1] = {
	 0x0696,  0x05FE,  0x03FE,  0x02B8,  0x0239,
	 0x01FE,  0x017E,  0x00FE,  0x007E,  0x003E,
	 0x0029,  0x0024,  0x001E,  0x0013,  0x000E,
	 0x0009,  0x0006,  0x0002,  0x0000
};

static unsigned int spdtab[] = {
	45, B0,		46, B0,		50, B50,
	75, B75,	110, B110,	134, B134,
	135, B134,	150, B150,	200, B200,
	300, B300,	600, B600,	1200, B1200,
	1800, B1800,	2000, B2000,	2400, B2400,
	3600, B3600,	4800, B4800,	7200, B7200,
	9600, B9600,	19200, EXTA,	38400, EXTB,
	0, B9600
};

/* speed strings used in setups() */
char *bauds[EXTB+1] = {
	" 45.5", "   50", "   75", "  110", "134.5",
	"  150", "  200", "  300", "  600", " 1200",
	" 1800", " 2000", " 2400", " 3600", " 4800",
	" 7200", " 9600", "19200", "38400"
};

/*
 * Z8530 baudrate divisor table	(from the TI Pro's tech manual)
 *	divisor		baud
 *
 *	 0x0696		45.5   
 *	 0x05FE		50.0   
 *	 0x03FE		75.0   
 *	 0x02B8		110.0  	( +0.03% )
 *	 0x0239		134.5  	( Selectric )
 *	 0x01FE		150.0  
 *	 0x017E		200.0  
 *	 0x00FE		300.0  
 *	 0x007E		600.0  
 *	 0x003E		1200.0 
 *	 0x0029		1800.0 	( -0.78% )
 *	 0x0024		2000.0 	( +1.05% )
 *	 0x001E		2400.0 
 *	 0x0013		3600.0 	( +1.59% )
 *	 0x000E		4800.0 
 *	 0x0009		7200.0 	( -3.03% )
 *	 0x0006		9600.0 
 *	 0x0002		19200.0
 *	 0x0000		38400.0	( unsupported )
 */
     
/*	
 * port_isr -- serial port interrupt service routine
 */

void interrupt (*o_portisr)();	/* old intr storage */

void interrupt
#ifdef debug
port_isr(bp,di,si,ds,es,dx,cx,bx,ax,ip,cs,flags)
unsigned int bp,di,si,ds,es,dx,cx,bx,ax,ip,cs,flags;
{
	char n;
regs[1]=ax; regs[2]=bx; regs[3]=cx; regs[4]=dx;
regs[5] = ip; regs[6] = cs; regs[7] = flags;
regs[8] = bp; regs[9] = di; regs[10] = si;
regs[11] = ds; regs[12] = es; regs[0] = 1;
#else
port_isr()
{
	char n;
#endif

	n = 0;

	if (inportb(a_cmd) & 0x01) {
		n++;
		/* then put char in buffer */
		buffer[xin++] = inportb(a_data);
		xin %= BUFMAX;
	}
#if (defined(ECHO) || defined(LOCAL))
	if (inportb(b_cmd) & 0x01) {
		n++;
		buffer[xin++] = inportb(b_data);
		xin %= BUFMAX;
	}
#endif
	if (n) {
		/* check buffer overflow, send XOFF if needed */
		if (flowctl && BUFC(xin,xout) > bufovfl)
			{ xmit_chr(XOFF); flxoff=1; }
	}
	enable();
	outportb(IC8259r1, 0x20);	/* 8259 : End-of-interrupt */
}
     
/*
 * set_prt  -  Set the baud rate, parity and stop bits for serial port.
 */
set_prt()
{
	int i;

	if (!a_cmd) return(-1);

	if (nbaud > EXTA)
		nbaud = B9600;
	
	i = nbaud;
		
	/* WR13 : baud rate time const upper byte */
	outportb(a_cmd, 13);
	outportb(a_cmd, bdivs[i] >> 8);

	/* WR12 : baud rate time const lower byte */
	outportb(a_cmd, 12);
	outportb(a_cmd, bdivs[i] & 0xff);

	/* WR4 : x16 clock mode, 1 or 2 stopbits, parity */
	i = 0x40;	/* x16 clock mode */
	i |= (stopbits) ? 0x0c : 0x04;	/* stop bits  ?  2 : 1 */
	i |= (parity << 1) | m_prty;	/* parity type & mode */
	outportb(a_cmd, 4);
	outportb(a_cmd, i);

	bufovfl = BUFMAX/2;
	bufmpty =  BUFMAX/8;

#ifdef debug
	regs[13] = BUFMAX; regs[14] = bufovfl; regs[15] = bufmpty;
#endif

	i = (7 + bpc) - 5;
	/* WR5 : DTR, RTS, bpc, Tx enable */
	outportb(a_cmd, 5);
	outportb(a_cmd, 0x8A | bpctab[i]);

	/* WR3 : bpc, Rx enable */
	outportb(a_cmd, 3);
	outportb(a_cmd, 0x01 | (bpctab[i]<<1));

	i = 3;
	outportb(a_cmd, 14);
	outportb(a_cmd, i);

#ifdef ECHO
	outportb(b_cmd, 14);
	outportb(b_cmd, 0x13);	/* BR gen enable/src, local loopback */
#endif
}

/*
 * init_prt - Initialize the port and install the port ISR.
 */
init_prt()
{
	int i, x;
	extern unsigned int sysconfig;

	/* pick a port number(n_port) based on sysconfig */
	for (i=0; n_port < 0 && i < NPORTS; i++)
		if (sysconfig & (0x10 << i))
			n_port = i;

	if (n_port < 0 || n_port > NPORTS-1) return(-1);

	n_intr = ports[n_port].vect;
	a_cmd = ports[n_port].base + A_CMD;
	b_cmd = ports[n_port].base + B_CMD;
	a_data = ports[n_port].base + A_DATA;
	b_data = ports[n_port].base + B_DATA;
     
 		/* clrbuf */
	for (i=0; i<8; i++) x = inportb(a_data);
	x = inportb(a_cmd);	/* makes it point to WR0 */
		/* serina */
	for (i=0; !(init_a[i] & 0x80); i+=2) {
		outportb(a_cmd, init_a[i]);
		outportb(a_cmd, init_a[i+1]);
	}
	x = inportb(b_cmd);	/* makes it point to WR0 */
		/* serinb */
	for (i=0; !(init_b[i] & 0x80); i+=2) {
		outportb(b_cmd, init_b[i]);
		outportb(b_cmd, init_b[i+1]);
	}

	xin = xout = 0;	/* initialize buffer indices */

	/* save old intr vector to another spot */
	o_portisr = getvect(n_intr);
	/* install the new interrupt routine */
	disable();
	setvect(n_intr, port_isr);
	enable();

		/* enable IR0, IR1, IR2, or IR4 */
	outportb(IC8259r2, inportb(IC8259r2) & ports[n_port].enable);
/*	outportb(IC8259r1, ports[n_port].disable);	*/
     
	set_prt();
}
     
/*
 *  reset_prt - restore the original interrupt, drop DTR and RTS
 */
reset_prt()
{
	if (!n_intr || !a_cmd) return(-1);

	/* WR9 : disable 8530 interrupts */
	outportb(a_cmd, 9);
	outportb(a_cmd, 0);
	/* WR5 : no DTR, no RTS, Tx enable, bpc */
	outportb(a_cmd, 5);
	outportb(a_cmd, 0x64 & bpctab[(7+bpc)-5]);

	/* disable interrupts */
	outportb(IC8259r2, inportb(IC8259r2) | ports[n_port].disable);
	/* restore the old interrupt vector */
	setvect(n_intr, o_portisr);
}
     
/*
 *  conn_prt - checks DCD and CTS.
 * (a historical relic, no longer used)
 */
conn_prt()
{
	int i;

	i = ((inportb(a_cmd) & 0x24) != 0x24);
	return(i);
}
     
/*
 * recv_chr - Receive a Character from the serial port.
 * returns:   c     - if there is a character in the buffer.
 *            -1    - if no character found.
 */
recv_chr()
{
	uchar c;

	if (flxoff && !xoff && BUFC(xin,xout) < bufmpty)
		{ xmit_chr(XON); flxoff=0; }

	if (BUFC(xin,xout) > 0) { /* get char from buffer */
		c = buffer[xout++] & 0x7f;
		xout %= BUFMAX;
		return(c);
	}
	return(-1);
}
     
recv_byt()
{
	uchar c;

	if (BUFC(xin,xout) > 0) {
		c = buffer[xout++];
		xout %= BUFMAX;
		return(c);
	}
	return(-1);
}
     
/*
 * xmit_chr - Send a character thru the serial port.
 *           It waits for the previous character to be sent before
 *           sending the current character.
 */
xmit_chr(c)
int c;
{
	while (!(inportb(a_cmd) & 0x04)) ;
#ifdef debug
regs[13] = inportb(a_cmd);
#endif
	outportb(a_data, c & 0xff);
}

xmit_eko(c)
int c;
{
#ifdef ECHO
	while (!(inportb(a_cmd) & 0x04)) ;
	outportb(a_data, c & 0xff);
	while (!(inportb(b_cmd) & 0x04)) ;
	outportb(b_data, c & 0xff);
#else
	xmit_lcl(c);
	xmit_eko(c);
#endif
}

xmit_lcl(c)
int c;
{
#ifdef LOCAL
	while (!(inportb(b_cmd) & 0x04)) ;
	outportb(b_data, c & 0xff);
#else
	buffer[xin++] = c;
	xin %= BUFMAX;
#endif
}

/*
 * xmit_str - Same as xmit_chr() except a string is sent instead.
 */
xmit_str(p)
char *p;
{
	int c;

	while (c = *p++) {
		while (!(inportb(a_cmd) & 0x04)) ;
		outportb(a_data, c & 0xff);
	}
}
     
/*
 * send_brk- Send a long break via the comm port.
 */
send_brk()
{

	if (!a_cmd) return(-1);

	/* WR5 : DTR, RTS, send break, Tx enable, bpc */
	outportb(a_cmd, 0x05);
	outportb(a_cmd, 0x9A | bpctab[(7+bpc)-5]);

	dsleep(250);	/* 1/4 sec. delay */

	/* WR5 : DTR, RTS, Tx enable, bpc */
	outportb(a_cmd, 0x05);
	outportb(a_cmd, 0x8A | bpctab[(7+bpc)-5]);

}

/*
 * hang_up- Drop the comm port connection
 */
hang_up()
{

	if (!a_cmd) return(-1);

	/* WR5 : no DTR, no RTS, Tx enable, bpc */
	outportb(a_cmd, 0x05);
	outportb(a_cmd, 0x08 | bpctab[(7+bpc)-5]);

	dsleep(250);	/* 1/4 sec. delay */

	/* WR5 : DTR, RTS, Tx enable, bpc */
	outportb(a_cmd, 0x05);
	outportb(a_cmd, 0x8A | bpctab[(7+bpc)-5]);

}

#ifndef ECHO
/* put char into incoming data buffer (ie. simulate echo) */
loop_chr(c)
int c;
{
	disable();
	buffer[xin++] = c;
	xin %= BUFMAX;
	enable();
}
#endif

/*
 * trns_chr: same as recv_chr but translate control chars
 */
trns_chr()
{
	uchar c;

	if (flxoff && !xoff && BUFC(xin,xout) < bufmpty)
		{ xmit_chr(XON); flxoff=0; }

	if (BUFC(xin,xout) > 0) { /* get char from buffer */
		c = buffer[xout++] & 0x7F;
		if (c & 0x60)
			xout %= BUFMAX;
		else {
			buffer[--xout] = c | 0x40;	/* '@' */
			c = '^';
		}
		return(c);
	}
	return(-1);
}

/* return bdivs index for speed n */
prtspd(n)
unsigned int n;
{
	int i;

	for (i=0; spdtab[i]; i+=2)
		if (spdtab[i] == n)
			return(spdtab[i+1]);
	return(nbaud);
}